TITAN V
NVIDIAconsumer| Overview | |
|---|---|
| Architecture | Volta (2017) |
| Launch date | Dec 7, 2017 (announced at NeurIPS/NIPS) |
| Process node | TSMC 12nm FFN |
| Transistor count | 21.1B |
| Compute capability | 7.0 |
| Memory | |
| VRAM | 12 GB HBM2 |
| Memory bandwidth | 653 GB/s |
| Compute — vector | |
| FP64 | 7.4 TFLOPS |
| FP32 | 14.9 TFLOPS |
| Compute — matrix / tensor | |
| FP16 | 110 TFLOPS |
| Cores & clocks | |
| Streaming Multiprocessors | 80 |
| Shader cores | 5,120 |
| Matrix / Tensor cores | 640 |
| Peak clock | 1,455 MHz |
| Board & system | |
| TDP | 250 W |
| PCIe | PCIe Gen3 x16 |
| MSRP | $2,999 |
Compatible CUDA Toolkit versions
Added 2026-09 alongside GTX 1080 Ti, TITAN X (Pascal), and TITAN RTX — the first-ever consumer/prosumer card with Tensor Cores, using the same GV100 die as this collection's V100 entry. Confirmed directly from NVIDIA's own official press release (nvidianews.nvidia.com, "NVIDIA TITAN V Transforms the PC into AI Supercomputer", Dec 7 2017, read via pdftotext): 21.1 billion transistors, TSMC 12nm FFN process customized for NVIDIA, 12GB HBM2, 110 TFLOPS Tensor (deep learning) performance, and $2,999 launch price — NVIDIA never published a full traditional spec sheet for this card the way it does for GeForce/Tesla SKUs, so several fields below aren't from an NVIDIA-authored table.
shaderCoreCount (5,120 CUDA cores), matrixCoreCount (640 Tensor Cores, 1st gen — identical counts to this collection's V100 entry, same die), peakClockMHz (1455 boost), and memoryBandwidthGBs (653, from HBM2 at 850MHz effective on a 3,072-bit bus) are corroborated consistently across independent GPU databases, not individually restated in NVIDIA's press release. fp32TFLOPS (14.9) and fp64TFLOPS (7.4) are likewise secondary-sourced and not from an NVIDIA table; they're internally consistent with V100 SXM2's own official 15.7/7.8 TFLOPS scaled down by Titan V's slightly lower boost clock (1455MHz vs V100's 1530MHz) — flagged here as the least-certain figures on this entry, worth a final check against a primary source if precision matters. fp16TFLOPS (110) is the one Tensor figure NVIDIA published directly. tdpWatts (250) is well-corroborated but not NVIDIA-stated.
2026-09-15 — added computeUnitCount (80 SMs), consistent with the shaderCoreCount (5,120) and matrixCoreCount (640) already recorded here: a GV100 SM carries 64 FP32 cores and 8 Tensor Cores, so both figures independently give 80 SMs. That is the same 80-of-84-SM GV100 configuration NVIDIA's Volta whitepaper documents for Tesla V100 (see this collection's V100 entry) — TITAN V is the same die and the same SM count, with consumer-side memory (12GB HBM2) and clocks.