RTX 4090
NVIDIAconsumer| Overview | |
|---|---|
| Architecture | Ada Lovelace (2022) |
| Process node | TSMC 4N |
| Transistor count | 76.3B |
| Compute capability | 8.9 |
| Memory | |
| VRAM | 24 GB GDDR6X |
| Memory bandwidth | 1,008 GB/s |
| Cache | 72 MB |
| Compute — vector | |
| FP32 | 82.6 TFLOPS |
| Compute — matrix / tensor | |
| TF32 | 82.6 TFLOPS |
| BF16 | 165.2 TFLOPS |
| FP16 (dense / sparse) | 165.2 / 330.4 TFLOPS |
| FP8 (dense / sparse) | 330.3 / 660.6 TFLOPS |
| INT8 (dense / sparse) | 660.6 / 1,321.2 TOPS |
| Cores & clocks | |
| Streaming Multiprocessors | 128 |
| Shader cores | 16,384 |
| Matrix / Tensor cores | 512 |
| Peak clock | 2,520 MHz |
| Board & system | |
| TDP | 450 W |
| Form factor | PCIe 3-slot |
| PCIe | PCIe Gen4 |
| MSRP | $1,599 |
Compatible CUDA Toolkit versions
Rewritten 2026-09-01 using NVIDIA's official "NVIDIA RTX Blackwell GPU Architecture" whitepaper (images.nvidia.com/aem-dam/Solutions/geforce/ blackwell/nvidia-rtx-blackwell-gpu-architecture.pdf), which includes a side-by-side RTX 3090/4090/5090 spec table (Table 1) plus a fuller Appendix A table — read via pdftotext after WebFetch failed on this PDF's binary structure. This single source super-supersedes the earlier, more scattered pull and confirms every previously-recorded figure was already correct.
tf32TFLOPS, bf16TFLOPS, fp16TFLOPS, and fp8TFLOPS are all dense Tensor-Core figures using FP32 accumulate (NVIDIA's own convention, matching this site's established methodology); the ...Sparse fields and int8TOPSSparse hold the structured-sparsity ("with sparsity") figures from the same rows. fp32TFLOPS (82.6) is the non-Tensor/vector "Peak FP32 TFLOPS" row — NVIDIA's whitepaper shows FP32, FP16, and BF16 non-Tensor throughput as numerically identical (82.6) on Ada's unified shader cores; tf32TFLOPS dense is also 82.6 for the same underlying reason (TF32 Tensor dense = FP32 vector rate on this die). int8TOPS/int8TOPSSparse (660.6/1321.2) match the card's own marketing "1,321 AI TOPS" figure exactly, confirming that headline number is the FP8(-with-FP16-accumulate)/INT8 sparse rate, not the FP32-accumulate figures used elsewhere in this file. NVIDIA does not list an FP4 Tensor row for RTX 4090 (Blackwell-only feature) — fp4TFLOPS omitted, not zero.
processNode ("TSMC 4N"), transistorCountBillion (76.3), cacheMB (72, from "L2 Cache Size: 73,728 KB"), computeUnitCount (128 SMs), matrixCoreCount (512 Tensor Cores, 4th Gen), and shaderCoreCount/ peakClockMHz (confirmed unchanged: 16,384 CUDA cores, 2,520 MHz boost) are all read directly from the same whitepaper table. Die size (608.5 mm²) and RT Core count/TFLOPS are published but out of scope for this AI/ML-focused schema.